One of the limitations of mobile computing devices (e.g., smartphones and tablets) today is the amount of volatile memory (e.g., DRAM) available on the computing device. Volatile memory is used both to run applications on the computing device and to temporarily store data to be written in non-volatile memory. The limited volatile memory capacity sometimes creates competition for its volatile memory space. For example, it is often desired to keep an application in volatile memory even though a user is not currently using the application, as this avoids the time needed to re-launch the application from scratch whenever the user returns to the application. However, there is a limit on the number of applications that can be stored in volatile memory. If the number of stored applications results in a shortage of volatile memory, a “swap out” process can be used to create free space in the volatile memory by moving some of the applications from volatile memory to non-volatile memory. However, if free space in volatile memory needs to be created very quickly to cache an unusually large amount of incoming data (e.g., when a user is using his smartphone to shoot a long video), the process of swapping out the applications may take too long, and the applications may need to be terminated in order to quickly create free space.
To avoid terminating applications (and to avoid the delay in re-launching them) when data is being transmitted faster than normal (“burst mode”), some computing devices write data directly into non-volatile memory at a high rate for a limited amount of time, with minimal use of the volatile memory as a cache. Unfortunately, several penalties may be incurred when returning to normal mode, such as needing to move the written data in the non-volatile memory from single-level cells (SLC) to multi-level cells (MLC) and needing to perform garbage collections operations that were suspended during burst mode. These penalties can put additional stress on memory resources.
Overview
Embodiments of the present invention are defined by the claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the below embodiments relate to a method and system for improving swap performance. In one embodiment, a computing device is provided with a volatile memory and a non-volatile memory, wherein the non-volatile memory has a first swap area with multi-level cell (MLC) memory and a second swap area with single-level cell (SLC) memory. One of the characteristics of SLC memory is that data is written more quickly in the SLC memory than the MLC memory. A determination is made whether the computing device is operating in normal mode or burst mode. If it is determined that the computing device is operating in normal mode, data is moved from the volatile memory to the first swap area during a swap operation. If it is determined that the computing device is operating in burst mode, data is moved from the volatile memory to the second swap area during a swap operation.
Other embodiments are possible, and each of the embodiments can be used alone or together in combination. Accordingly, various embodiments will now be described with reference to the attached drawings.